1. Field of the Invention
The present invention relates to a semiconductor device and a manufacturing method therefor, and particularly relates to a CMOS semiconductor device and a manufacturing method therefor.
2. Description of the Related Art
The operating speed of CMOS transistors has been improving in order to increase the operating frequency of microprocessors. The speed improvement owes much to miniaturization of CMOS transistors. The miniaturization of CMOS transistors has been achieved by channel length reduction due to wavelength reduction of light used in lithography and by thickness reduction of gate oxide films of gate electrodes. However, minimum photo-etching size is becoming smaller than the wavelength of light used in lithography. Moreover, thickness reduction of gate oxide films of gate electrodes cannot go beyond current limits because withstand pressure of the films needs to be maintained. As a result, further miniaturization of CMOS transistors is becoming difficult.
In view of these facts, it has been proposed to use a metal material as a gate electrode material in CMOS transistors having a minimum photo-etching size is 50 nm or less (e.g. Japanese Patent Laid-Open Publication No. 2000-31296).
If a metal material is used as a gate electrode material, gate electrode depletion is suppressed and gate electrode resistance is reduced in comparison with conventionally-used polysilicon materials.
However, transistors having metal gate electrodes containing a stable metal material generally have a threshold voltage absolute value as high as 0.5 V (typical value). Therefore, it is difficult to apply such transistors to high-speed semiconductor devices. Furthermore, if a stable material that is applicable to both n-channel transistors and p-channel transistors is used as a gate electrode material, an allowable range of threshold voltage becomes smaller, thereby making it difficult to design versatile semiconductor devices.